Module Permissions for Verilog-Perl

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Verilog::EditFiles WSNYDER
Verilog::Getopt WSNYDER
Verilog::Language WSNYDER
Verilog::Netlist WSNYDER
Verilog::Netlist::Cell WSNYDER
Verilog::Netlist::ContAssign WSNYDER
Verilog::Netlist::Defparam WSNYDER
Verilog::Netlist::File WSNYDER
Verilog::Netlist::File::Parser WSNYDER
Verilog::Netlist::Interface WSNYDER
Verilog::Netlist::Logger WSNYDER
Verilog::Netlist::ModPort WSNYDER
Verilog::Netlist::Module WSNYDER
Verilog::Netlist::Net WSNYDER
Verilog::Netlist::Pin WSNYDER
Verilog::Netlist::PinSelection WSNYDER
Verilog::Netlist::Port WSNYDER
Verilog::Netlist::Subclass WSNYDER
Verilog::Parser WSNYDER
Verilog::Preproc WSNYDER
Verilog::SigParser WSNYDER
Verilog::Std WSNYDER