Verilog::Parser - Parse Verilog language files
use Verilog::Parser; my $parser = new Verilog::Parser; $string = $parser->unreadback (); $line = $parser->line (); $parser->parse ($text) $parser->parse_file ($filename)
The Verilog::Parser package will tokenize a Verilog file when the parse() method is called and invoke various callback methods. This is useful for extracting information and editing files while retaining all context. For netlist like extractions, see Verilog::Netlist.
Verilog::Parser
Verilog::Netlist
The external interface to Verilog::Parser is:
Create a new Parser.
Parse the $string as a verilog file. Can be called multiple times. The return value is a reference to the parser object.
This method can be called to parse text from a file. The argument can be a filename or an already opened file handle. The return value from parse_file() is a reference to the parser object.
This method can be called to parse preprocessed text from a predeclared Verilog::Preproc object.
Return any input string from the file that has not been sent to the callback. This will include whitespace and tokens which did not have a callback. (For example comments, if there is no comment callback.) This is useful for recording the entire contents of the input, for preprocessors, pretty-printers, and such.
Return (if $set is undefined) or set current line number.
Return (if $set is undefined) or set current filename.
In order to make the parser do anything interesting, you must make a subclass where you override one or more of the following methods as appropriate:
This method is called when any text in // or /**/ comments are recognized. The first argument, $token, is the contents of the comment excluding the comment delimiters.
This method is called when any text in double quotes are recognized, or on the text of protected regions. The first argument, $token, is the contents of the string including the quotes.
This method is called when any Verilog keyword is recognized. The first argument, $token, is the keyword.
This method is called when any Verilog symbol is recognized. A symbol is considered a non-keyword bareword. The first argument, $token, is the symbol.
This method is called when any symbolic operator (+, -, etc) is recognized. The first argument, $token, is the operator.
This method is called when any number is recognized. The first argument, $token, is the number. The Verilog::Language::number_value function may be useful for converting a Verilog value to a perl integer.
Here\'s a simple example which will print every symbol in a verilog file.
package MyParser; use Verilog::Parser; @ISA = qw(Verilog::Parser);
# parse, parse_file, etc are inherited from Verilog::Parser sub new { my $class = shift; #print "Class $class\n"; my $self = $class->SUPER::new(); # we could have inherited new, but we want to initialize symbols %{$self->{symbols}} = (); bless $self, $class; return $self; }
sub symbol { my $self = shift; my $token = shift;
$self->{symbols}{$token}++; }
sub report { my $self = shift;
foreach my $sym (sort keys %{$self->{symbols}}) { printf "Symbol %-30s occurs %4d times\n", $sym, $self->{symbols}{$sym}; } }
package main;
my $parser = MyParser->new(); $parser->parse_file (shift); $parser->report();
Verilog::Preproc, Verilog::ParserSig, Verilog::Language, Verilog::Netlist, Verilog::Getopt, vrename, vpm
Verilog::Preproc
Verilog::ParserSig
Verilog::Language
Verilog::Getopt
vrename
vpm
This is being distributed as a baseline for future contributions. Don\'t expect a lot, the Parser is still nieve, and there are many awkward cases that aren\'t covered.
The parser currently assumes the string it is passed ends on a newline boundary. It should be changed to allow arbitrary chunks.
Cell instantiations without any arguments are not supported, a empty set of parenthesis are required. (Use "cell cell();", not "cell cell;".)
The latest version is available from http://veripool.com/verilog-perl.
http://veripool.com/verilog-perl
Wilson Snyder <wsnyder@wsnyder.org>
To install Verilog::Parse, copy and paste the appropriate command in to your terminal.
cpanm
cpanm Verilog::Parse
CPAN shell
perl -MCPAN -e shell install Verilog::Parse
For more information on module installation, please visit the detailed CPAN module installation guide.