Verilog::Language - Verilog language utilities
use Verilog::Language; $result = Verilog::Language::is_keyword ("wire"); # true $result = Verilog::Language::is_compdirect ("`notundef"); # false $result = Verilog::Language::number_value ("4'b111"); # 8 $result = Verilog::Language::number_bits ("32'h1b"); # 32 $result = Verilog::Language::number_signed ("1'sh1"); # 1 @vec = Verilog::Language::split_bus ("[31,5:4]"); # 31, 5, 4 @vec = Verilog::Language::split_bus_nocomma ("[31:29]"); # 31, 30, 29 $result = Verilog::Language::strip_comments ("a/*b*/c"); # ac
This package provides useful utilities for general use with the Verilog Language. General functions will be added as needed.
Return true if the given symbol string is a Verilog reserved keyword.
Return true if the given symbol string is a Verilog compiler directive.
Return the number of bits in a value string, or undef if incorrectly formed, _or_ not specified.
Return true if the Verilog value is signed, else undef.
Return the numeric value of a Verilog value, or undef if incorrectly formed. It ignores any signed Verilog attributes, but is is returned as a perl signed integer, so it may fail for over 31 bit values.
Return a list of expanded arrays. When passed a string like "foo[5:1:2,10:9]", it will return a array with ("foo[5]", "foo[3]", ...). It correctly handles connectivity expansion also, so that "x[1:0] = y[3:0]" will get intuitive results.
As with split_bus, but faster. Only supports simple decimal colon separated array specifications, such as "foo[3:0]".
Return text with any // or /**/ comments stripped, correctly handing quoted strings. Newlines will be preserved in this process.
The latest version is available from CPAN and from http://www.veripool.com/verilog-perl.html.
Copyright 2000-2005 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License or the Perl Artistic License.
Wilson Snyder <wsnyder@wsnyder.org>
Verilog::Parser, Verilog::ParseSig, Verilog::Getopt
To install Verilog::Parse, copy and paste the appropriate command in to your terminal.
cpanm
cpanm Verilog::Parse
CPAN shell
perl -MCPAN -e shell install Verilog::Parse
For more information on module installation, please visit the detailed CPAN module installation guide.