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CXW

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5 non-PAUSE users.

Wilson Snyder

Documentation

  • vhier - Return all files in a verilog hiearchy using Verilog::Netlist
  • vpm - Preprocess Verilog code assertions
  • vppp - Preprocess Verilog code using verilog-perl
  • vrename - change signal names across many Verilog files

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