Verilog-CodeGen

Changes for version 0.9.3 - 2003-05-09

-The addidtions to handle multiple designs were broken. Fixed that. -Added a "Set design" Entry to the GUI. Documented this change. -Removed the ugly "for testing" stuff from the device object code template. It is now added before parsing.

Verilog code generator

Verilog code generator GUI

in CodeGen.pm

To install Verilog::CodeGen, copy and paste the appropriate command in to your terminal.

cpanm Verilog::CodeGen

perl -MCPAN -e shell
install Verilog::CodeGen

For more information on module installation, please visit the detailed CPAN module installation guide.

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