Timer::CPU - Precise user-space timer using the CPU clock River stage zero No dependents

For most timer operations, Time::HiRes is great. Since it provides microsecond resolution in real "wall-clock" time it is very useful for determining how long an operation actually takes in seconds. However, on most CPUs it is possible to take much h...

FRACTAL/Timer-CPU-0.100 - 15 Feb 2014 06:19:07 GMT

Monitis::CPU - Predefined internal CPU monitors manipulation River stage zero No dependents

YKO/Monitis-0.9 - 20 Jun 2011 13:36:11 GMT

Cisco::SNMP::CPU - CPU Interface for Cisco Management River stage zero No dependents

The following methods are for CPU utilization. These methods implement the "CISCO-PROCESS-MIB" and "OLD-CISCO-SYS-MIB"....

VINSWORLD/Cisco-SNMP-1.05 - 06 Oct 2017 12:34:12 GMT

Sysstat::Sar::CPU - Sysstat sar module to handle cpu information River stage zero No dependents

HEINCE/Sysstat-Sar-0.003 - 16 Oct 2016 12:31:22 GMT

Sysstat::Sar::CPU - Sysstat sar module to handle cpu information River stage zero No dependents

HEINCE/Sysstat-Sar-0.003 - 16 Oct 2016 12:31:22 GMT

CPU::Emulator::Z80 - a Z80 emulator River stage zero No dependents

This class provides a virtual Z80 micro-processor written in pure perl. You can program it in Z80 machine code. Machine code is fast! This will make your code faster!...

DCANTRELL/CPU-Emulator-Z80-1.0 - 13 Jun 2008 20:46:45 GMT

CPU::Emulator::6502 - Class representing a 6502 CPU River stage zero No dependents

REGISTERS * acc - Accumulator * x * y * pc - Program Counter * sp - Stack Pointer * status...

BRICAS/Games-NES-Emulator-0.03 - 13 Aug 2007 12:48:41 GMT

CPU::Z80::Assembler - a Z80 assembler River stage zero No dependents

This module provides functions to assemble a set of Z80 assembly instructions given as a list or as an iterator, or a Z80 assembly source file....

PSCUST/CPU-Z80-Assembler-2.16 - 20 Feb 2018 19:49:49 GMT

CPU::Emulator::Memory - memory for a CPU emulator River stage one • 1 direct dependent • 1 total dependent

This class provides a flat array of values which you can 'peek' and 'poke'....

DCANTRELL/CPU-Emulator-Memory-1.1004 - 12 Apr 2017 22:17:38 GMT

CPU::Emulator::DCPU16 - an emulator for Notch's DCPU-16 virtual CPU for the game 0x10c River stage zero No dependents

DCPU-16 is a spec for a virtual CPU by Notch from Mojang (of Minecraft fame). The spec is available here http://0x10c.com/doc/dcpu-16.txt...

SIMONW/CPU-Emulator-DCPU16-0.3 - 20 Apr 2012 02:16:31 GMT

Paws::DeviceFarm::CPU River stage two • 8 direct dependents • 10 total dependents

Represents the amount of CPU that an app is using on a physical device. Note that this does not represent system-wide CPU usage....

JLMARTIN/Paws-0.39 - 11 Feb 2019 10:07:49 GMT

Linux::Cpuinfo - Object Oriented Interface to /proc/cpuinfo River stage zero No dependents

On Linux systems various information about the CPU ( or CPUs ) in the computer can be gleaned from "/proc/cpuinfo". This module provides an object oriented interface to that information for relatively simple use in Perl programs. METHODS The interfac...

JSTOWE/Linux-Cpuinfo-1.12 - 07 Jun 2015 15:14:06 GMT

AnyEvent::Monitor::CPU - monitors your process CPU usage, with high/low watermark triggers River stage zero No dependents

This module gives you a CPU monitor with high/low threseholds and triggers. On a regular basis, it will check the CPU usage of the current process. If the usage is above your designated upper limit for more than a number of samples, it will trigger t...

MELO/AnyEvent-Monitor-CPU-0.3 - 10 Oct 2009 17:31:56 GMT

CPU::Z80::Disassembler - Disassemble the flow of a Z80 program River stage zero No dependents

Implements a Z80 disassembler. Loads a binary file into memory and dumps an unprocessed disassembly listing (see "write_dump"). Alternatively there are functions to tell the disassembler where there are data bytes and what are code entry points and l...

PSCUST/CPU-Z80-Disassembler-0.06 - 17 Mar 2019 22:46:48 GMT

Cisco::UCS::Blade::CPU - Class for operations with a Cisco UCS Blade CPUs. River stage zero No dependents

LTP/Cisco-UCS-0.51 - 25 May 2016 04:40:47 GMT

Sys::Info::Device::CPU River stage three • 8 direct dependents • 185 total dependents

Collects and returns information about the Central Processing Unit (CPU) on the host machine. Some platforms can limit the available information under some user accounts and this will affect the accessible amount of data. When this happens, some meth...

BURAK/Sys-Info-Base-0.7807 - 25 Dec 2018 19:23:44 GMT

CPU::Emulator::Z80::ALU River stage zero No dependents

This mix-in provides functions for addition and subtraction on a Z80, settings flags and doing twos-complement jibber-jabber....

DCANTRELL/CPU-Emulator-Z80-1.0 - 13 Jun 2008 20:46:45 GMT

CPU::Z80::Assembler::Expr - Represents one assembly expression to be computed at link time River stage zero No dependents

This module defines the class that represents one assembly expression to be computed at link time....

PSCUST/CPU-Z80-Assembler-2.16 - 20 Feb 2018 19:49:49 GMT

CPU::Z80::Assembler::List - Assembly listing output class River stage zero No dependents

This module handles the output of the assembly listing file. It is fead with each assembled opcode and generates the full assembly list file on the given output handle. If output is undef, does not generate any output....

PSCUST/CPU-Z80-Assembler-2.16 - 20 Feb 2018 19:49:49 GMT

Games::NES::Emulator::CPU - NES Central Processing Unit River stage zero No dependents

BRICAS/Games-NES-Emulator-0.03 - 13 Aug 2007 12:48:41 GMT

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